use crate::{Address, Byte, Result};

use super::Ram;

/// 内存总线，处理所有内存访问
pub struct MemoryBus {
    ram: Ram,
    // 未来将添加 ROM 和内存映射 I/O 设备
}

impl MemoryBus {
    pub fn new(ram: Ram) -> Self {
        MemoryBus { ram }
    }

    pub fn read(&self, address: Address) -> Result<Byte> {
        // 这里将实现内存映射逻辑
        // 目前只访问 RAM
        self.ram.read(address)
    }

    pub fn write(&mut self, address: Address, value: Byte) -> Result<()> {
        // 这里将实现内存映射逻辑
        // 目前只访问 RAM
        self.ram.write(address, value)
    }
}

#[cfg(test)]
mod tests {
    use super::*;

    #[test]
    fn test_memory_bus() {
        let ram = Ram::new(0x1000);
        let mut bus = MemoryBus::new(ram);
        
        // 测试写入和读取
        bus.write(0x100, 0xCD).unwrap();
        assert_eq!(bus.read(0x100).unwrap(), 0xCD);
    }
}